
/******************************************************************************
COPYRIGHT 2002 STMicroelectronics
Source File Name :  sci.h 
Group            : IPSW,CMG-IPDF
Author           : MCD Application Team
Date First Issued: 5/3/2002
General Purpose - Contains prototypes for all the functions of SCI
********************************Documentation**********************************/
#if defined(NAVI_FUNCTION)

#define SCI_HEAD_CODE		0xa9////0x55

/*-----------------------Select the mode of communication--------------------*/
#define SCI_POLLING_TX                         /* Polling mode transmission*/
//#define SCI_POLLING_RX                         /* Polling mode reception */     
///#define SCI_ITDRV_WITHOUTBUF_RX
// #define INTRPTDRV_WITHOUTBUF_TX                                           
                        /* Interrupt driven without buffer transmission mode */       
//#define INTRPTDRV_WITHOUTBUF_RX                                          	
                           /* Interrupt driven without buffer reception mode */ 
                 /* Description of all the functions defined in this module. */
                                           /*Parameters for Control Register1*/


/******************************************************************************
BIT DEFINITIONS
******************************************************************************/
/**************************Status Register bits*******************************/
#define TEX		  0x80	//transmit data register empty
//This bit is set by hardware when the content of the TDR register has been
//transferred into the shift register. An interrupt is generated if the TIEN bit =1 in the
//USART_CR2 register. It is cleared by a write to the USART_DR register.
//0: Data is not transferred to the shift register
///1: Data is transferred to the shift register
#define SCI_TC        0x40
///This bit is set by hardware when transmission of a frame containing Data is
///complete. An interrupt is generated if TCIEN=1 in the USART_CR2 register. It is
///cleared by a software sequence (a read to the USART_SR register followed by a
///write to the USART_DR register).
///0: Transmission is not complete
///1: Transmission is complete
#define SCI_RDRF    0x20///Read data Register Not Empty.
#define SCI_IDLE     0x10///IDLE line detected.
#define SCI_ORE      0x08///OverRun error.
#define SCI_NE         0x04///Noise Flag.
#define SCI_FE        0x02///Framing Error.
#define SCI_PE        0x01///Parity Error.

/*********************Control Register bits**********************************/

/************************USART_CR1**************************************/
#define SCI_RX_9TH	0x80///This bit is used to store the 9th bit of the received word when M=1
#define SCI_TX_9TH	0x40///This bit is used to store the 9th bit of the transmitted word when M=1
#define SCI_SARTD	0x20///USART Disable (for low power consumption).
#define SCL_M		0x10///word length.
///This bit determines the word length. It is set or cleared by software.
///0: 1 Start bit, 8 Data bits, n Stop bit (n depending on STOP[1:0] bits in the USART_CR3 register)
///1: 1 Start bit, 9 Data bits, 1 Stop bit
///Note: The M bit must not be modified during a data transfer (both transmission and reception)

#define SCL_WAKE	0x08///Wakeup method.
#define SCL_PCEN	0x04///Parity Control Enable.
#define SCL_PS		0x02///Parity Selection.
#define SCL_PIEN		0x01///Parity Interrupt Enable.
/************************USART_CR2**************************************/

#define SCI_TDRE  	0x80///TIEN transmitter interrupt enable 
#define SCI_TCIEN	0x40///Transmission Complete Interrupt Enable.
#define SCI_RIEN		0x20///Receiver Interrupt Enable.
#define SCI_ILIEN	0x10///IDLE Line Interrupt Enable.
#define SCI_TEN		0x08///Transmitter Enable.It is set and cleared by software.
#define SCI_REN		0x04///Receiver Enable. It is set and cleared by software.
#define SCI_RWU		0x02///Receiver wakeup.
///This bit determines if the USART2 is in mute mode or not. It is set and cleared by
///software and can be cleared by hardware when a wakeup sequence is recognized.

#define SCI_SBK		0x01///Send Break.
/************************USART_CR3**************************************/

/************************USART_CR4**************************************/

/************************USART_CR5**************************************/
 ///8000000/115200=0x0045  then    LINUART_BRR1=0x04   LINUART_BRR2=0x05
 ///8000000/19200=  0x01a0  then    LINUART_BRR1=0x1a   LINUART_BRR2=0x0
  ///8000000/57600=  0x008a  then    LINUART_BRR1=0x8   LINUART_BRR2=0xa
  ///8000000/38400=0x00d0    then    LINUART_BRR1=0x0d   LINUART_BRR2=0x0
  ///8000000/9600=0x0341   
 #if (NOWADA_NAVI_MODEL)
#define LINUSART_DIV_MAINTISSA  1a
#define LINUSART_DIV_FRACTION 	  0	///		LINUART_BRR2
 #elif 1///(NAVI_SACGM2005_MODEL)
#define LINUSART_DIV_MAINTISSA  0x0d//   LINUART_BRR1   
#define LINUSART_DIV_FRACTION 	  0	///		LINUART_BRR2
#elif (NAVI_SACGM1002_MODEL)
#define LINUSART_DIV_MAINTISSA  0x1a//// 0x0d//  0x04	//LINUART_BRR1   
#define LINUSART_DIV_FRACTION 	   0	///	0x05	///LINUART_BRR2
#endif



#define SCI_ErrValue 0x0f                         /*Error bits in SR register*/

typedef enum{///USART_CR1
	SCI_DEFAULT_PARAM1      = (unsigned char) 0x00,    
	SCI_WORDLENGTH_9        = (unsigned char) 0x10, //SCL_M
	SCI_ODPARITY_SELECT     = (unsigned char) 0x06,
	SCI_EVPARITY_SELECT     = (unsigned char) 0x04,
	SCI_WAKEUP_ADDR         = (unsigned char) 0x08///Wakeup method.
}SCI_Type_Param1;

typedef enum {                             /*Parameters for Control Register2*/
	SCI_MUTE_ENABLE            = (unsigned char) 0x02, 
	SCI_BREAK_ENABLE        = (unsigned char) 0x01,
	SCI_DEFAULT_PARAM2      = (unsigned char) 0x00
}SCI_Type_Param2;

typedef enum {
	SCI_PR_1    = (unsigned char) 0x00,    /*parameters for baudrate register*/
	SCI_PR_3    = (unsigned char) 0x40,    
	SCI_PR_4    = (unsigned char) 0x80,
	SCI_PR_13    = (unsigned char) 0xc0,
	SCI_TR_1    = (unsigned char) 0x00,
	SCI_TR_2    = (unsigned char) 0x08,
	SCI_TR_4    = (unsigned char) 0x10,
	SCI_TR_8    = (unsigned char) 0x18,
	SCI_TR_16    = (unsigned char) 0x20,
	SCI_TR_32    = (unsigned char) 0x28,
	SCI_TR_64    = (unsigned char) 0x30,
	SCI_TR_128  = (unsigned char) 0x38,
	SCI_RR_1    = (unsigned char) 0x00,
	SCI_RR_2    = (unsigned char) 0x01,
	SCI_RR_4    = (unsigned char) 0x02,
	SCI_RR_8    = (unsigned char) 0x03,
	SCI_RR_16    = (unsigned char) 0x04,
	SCI_RR_32    = (unsigned char) 0x05,
	SCI_RR_64    = (unsigned char) 0x06,
	SCI_RR_128  = (unsigned char) 0x07
}SCI_Baudrate_Type;
                   
typedef enum {                           /*Parameters for enabling interrupts*////USART_SR
	SCI_IDLE_LINE               = (unsigned char) 0x10,
	SCI_RECEIVE_OVERRUN         = (unsigned char)0x20,
	SCI_TRANSMIT_REGISTER_READY = (unsigned char) 0x80,
	SCI_FRAME_TRANSMITTED       = (unsigned char) 0x40,
	SCI_PARITY_ERROR            = (unsigned char) 0x01
}SCI_IT_Type;

typedef enum {                                 /*Parameters for enabling mode*/ //USART_CR2
	SCI_TX_ENABLE        = (unsigned char) 0x08,
	SCI_RX_ENABLE        = (unsigned char) 0x04
 }SCI_Mode_Type;

typedef enum {                                                  /*Error Types*/
	SCI_BUFFER_ONGOING      = (unsigned char) 0xff,
	SCI_STRING_ONGOING      = (unsigned char) 0xfe,
	SCI_NOISE_ERR           = (unsigned char) 0x04,
	SCI_OVERRUN_ERR         = (unsigned char) 0x08,
	SCI_FRAMING_ERR         = (unsigned char) 0x02,
	SCI_PARITY_ERR          = (unsigned char) 0x01,
	SCI_RECEIVE_OK          = (unsigned char) 0x00,
	SCI_RX_DATA_EMPTY       = (unsigned char) 0xfd
}SCI_RxError_t;


/*****************************MACRO definitions********************************/       

/*****************For selecting Transmitter or Receiver mode ******************/

#define LINUSART_Mode2(Usart_Mode_Param)  ((LINUART_CR2) |= (Usart_Mode_Param));
#define LINUART_TX_EN()			{(LINUART_CR2) |=SCI_TX_ENABLE;  (LINUART_CR1) &=0xdf; }
#define LINUART_TX_DIS()		{(LINUART_CR2) &=~SCI_TX_ENABLE;  (LINUART_CR2) &=~SCI_RX_ENABLE; (LINUART_CR1) |=0x20; }

#define LINUART_EN_RX_INT		(LINUART_CR2|=0x20)
#define LINUART_DIS_RX_INT		(LINUART_CR2&=0b11011111)
#define LINUART_EN_TX_INT		(LINUART_CR2|=0b10000000)
#define LINUART_DIS_TX_INT		(LINUART_CR2&=0b01111111)
/************************* For enabling SCI interrupts ***********************/

#define LINUSART_IT_Enable(Usart_IT_Param) \
(LINUART_CR1 |= (unsigned char)((Usart_IT_Param)&(SCI_PARITY_ERROR)));   \
(LINUART_CR2 |= (unsigned char)((Usart_IT_Param)&(~(unsigned char)SCI_PARITY_ERROR))); \
(LINUART_CR3|=0x40);\

/*************************** For Selecting the Baudrate **********************/


#define LINUSART_Select_Baudrate(Baudrate_DivM,Baudrate_DivF) { LINUART_BRR2 =Baudrate_DivF;LINUART_BRR1= Baudrate_DivM;}

ext uchar NAVI_Rx_Checsum;
ext uchar SCI_Rx_Buff;
ext uchar SCI_Tx_Buff;
/***************************Function declarations*****************************/
extern void LINUSART_Init ( SCI_Type_Param1  Init_Value1, SCI_Type_Param2  Init_Value2);    /*Initialises the SCI*/
extern void SCI_IT_Disable(SCI_IT_Type SCI_IT_Param);/*Disables the desired the interrupt */
extern void SCI_PutByte (unsigned char Tx_DATA);          /*Transmits a single data byte*/
extern BOOL SCI_IsTransmitCompleted( void);    /*Checks if transmission is completed*/
extern void SCI_PutBuffer (const unsigned char *PtrtoBuffer, signed char NbOfBytes);
                                                   /*Transmits a user buffer*/
extern void SCI_GetBuffer(unsigned char *PtrtoBuffer) ; 
extern void SCI_IT_Function (void);




#endif
/**** (c) 2002   STMicroelectronics *************************** END OF FILE **/


